VESD05A8A-HNH www.vishay.com vishay semiconductors rev. 1.5, 26-jun-12 1 document number: 81629 for technical questions, contact: esdprotection@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 8-line esd-protection diode array in llp1713-9l marking (example only) dot = pin 1 marking ? y = type code (see table below) ? xx = date code features ? ultra compact llp1713-9l package ? low package profile < 0.6 mm ? 8-line esd-protection ? low leakage current i r < 1 a ? low load capacitance c d = 30 pf ? esd-immunity acc. iec 61000-4-2 ? 25 kv contact discharge ? 30 kv air discharge ? working voltage range v rwm = 5 v ? e4 - precious metal (e.g. ag , au, nipd, nipdau) (no sn) ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 20522 1 2 3 4 8 7 6 5 20521 9 yxx 20719 ordering information device name ordering code taped units per reel (8 mm tape on 7" reel) minimum order quantity vesd05a 8 a-hnh VESD05A8A-HNH-gs08 3000 15 000 package data device name package name type code weight molding compound flammability rating moisture sensitivity level soldering conditions vesd05a 8 a-hnh llp1713-9l b 3.7 mg ul 94 v-0 msl level 1 (according j-std-020) 260 c/10 s at terminals absolute maximum ratings rating test conditions symbol value unit peak pulse current bias-mode: each input (pin 1 to pin 8) to ground (pin 9) acc. iec 61000-4-5; t p = 8/20 s; single shot i ppm 5a bisy-mode: each input (pin 1 to pin 8) to any other input pin. pin 9 not connected. acc. iec 61000-4-5; t p = 8/20 s/single shot i ppm 2.5 a peak pulse power bias-mode: each input (pin 1 to pin 8) to ground (pin 9) acc. iec 61000-4-5; t p = 8/20 s; single shot p pp 65 w bisy-mode: each input (pin 1 to pin 8) to any other input pin pin 9 not connected. acc. iec 61000-4-5; t p = 8/20 s/single shot p pp 33 w esd immunity contact discharge acc. iec61000-4-2; 10 pulses bias-mode: each input (pin 1 to pin 8) to ground (pin 9) v esd 25 kv air discharge acc. iec61000-4-2; 10 pulses bias-mode: each input (pin 1 to pin 8) to ground (pin 9) v esd 30 kv contact discharge acc. iec61000-4-2; 10 pulses bisy-mode: each input (pin 1 to pin 8) to any other input pin. pin 9 not connected. v esd 12 kv air discharge acc. iec61000-4-2; 10 pulses bisy-mode: each input (pin 1 to pin 8) to any other input pin. pin 9 not connected. v esd 12 kv operating temperature junction temperature t j - 40 to + 125 c storage temperature t stg - 55 to + 150 c
VESD05A8A-HNH www.vishay.com vishay semiconductors rev. 1.5, 26-jun-12 2 document number: 81629 for technical questions, contact: esdprotection@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 bias-mode (8-line bidirectional asymmetrical protection mode) with the VESD05A8A-HNH up to 8 signal- or data-lines (l1 to l8) can be protected against voltage transients. with pin 9 connected to ground and pin 1 up to pin 8 connected to a signal- or data-line which has to be protected. as long as the voltage level on the data- or signal-line is between 0 v (ground level) and the specified maxi mum reverse working voltage (v rwm ) the protection diode betwee n data line and ground offer a high isolation to the ground line. the protection device behaves like an open switch. as soon as any positive transient voltag e signal exceeds the break through voltage level of the protection diode, the diode becomes conductive and shorts the transi ent current to ground. now the protection device behaves like a closed switch. the clamping voltage (v c ) is defined by the breakthrough voltage (v br ) level plus the voltage drop at the series impedance (resistance and inductance) of the protection device. any negative transient signal will be clamped accordingly. the negative transient current is flowing in the forward direction o f the protection diode. the low forward voltage (v f ) clamps the negative transien t close to the ground level. due to the different clamping levels in forward and reverse direction the vesd05a8a- hnh clamping behaviour is bidirectional and ssymmetrical (bias). ? ? electrical characteristics (between pin 1 to 8 and pin 9) ? (t amb = 25 c, unless otherwise specified) parameter test conditions/remarks symbol min. typ. max. unit protection paths number of lines whic h can be protected n channel --8lines reverse stand-off voltage max. reverse working voltage v rwm --5v reverse voltage at i r = 1 a v r 5--v reverse current at v r = v rwm = 5 v i r - < 0.1 1 a reverse breakdown voltage at i r = 1 ma v br 68v reverse clamping voltage at i pp = 5 a acc. iec 61000-4-5 v c -13v forward clamping voltage at i f = 5 a acc. iec 61000-4-5 v f -4.5v capacitance at v r = 0 v; f = 1 mhz c d -3035pf at v r = 2.5 v; f = 1 mhz c d -1823pf l1 l8 l3 l6 l2 l7 l4 l5 20524 1 2 3 4 8 7 6 5 9
VESD05A8A-HNH www.vishay.com vishay semiconductors rev. 1.5, 26-jun-12 3 document number: 81629 for technical questions, contact: esdprotection@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 if a higher surge current or peak pulse current (i pp ) is needed, some protection diodes in the VESD05A8A-HNH can also be used in parallel in order to multiply the performance. if two diodes are switched in parallel you get ? double surge power = double peak pulse current (2 x i ppm ) ? half of the line inductance = reduced clamping voltage ? half of the line resistance = reduced clamping voltage ? double line capacitance (2 x c d ) ? double reverse leakage current (2 x i r ) ? bisy-mode (7-line bidirectional symme trical protection mode) if a bipolar symmetrical pro tection device is needed the VESD05A8A-HNH can also be used as a seven-line protection device. therefore seven pins (example: pin 1, 2, 3, 4, 6, 7 and 8) has to be connected to the signalor data-line (l1 to l7) and pin 5 t o ground. pin 9 must not be connected! positive and negative voltage transients will be clamped in the same way. the clamping current from one data line through the VESD05A8A-HNH to the ground passes one diode in forward direct ion and the other one in reve rse direction. the clamping voltage (v c ) is defined by the breakthrough voltage (v br ) level of one diode plus the forward voltage of the other diode plus the voltage drop at the series impedances (resista nces and inductances) of the protection device. due to the same clamping levels in positive and negative direction the VESD05A8A-HNH voltag e clamping behaviour is also bidirectional and symmetrical (bisy). electrical characteristics (between any of the pins 1 to 8; pin 9 not connected) ? (t amb = 25 c, unless otherwise specified) parameter test conditions/remarks symbol min. typ. max. unit protection paths number of li nes which can be protected n channel --7lines reverse stand-off voltage max. reverse working voltage v rwm --5.5v reverse voltage at i r = 1 a v r 5.5 - - v reverse current at v r = v rwm = 5.5 v i r - < 0.1 1 a reverse breakdown voltage at i r = 1 ma v br 6.5 8.7 v reverse clamping voltage at i pp = 2.5 a acc. iec 61000-4-5 v c -13v capacitance at v r = 0 v; f = 1 mhz c d -3035pf at v r = 2.5 v; f = 1 mhz c d -1823pf l1 l4 l2 l3 20525 1 2 3 4 8 7 6 5 9 l1 l7 l3 l5 l2 l6 l4 20526_1 1 2 3 4 8 7 6 5 9
VESD05A8A-HNH www.vishay.com vishay semiconductors rev. 1.5, 26-jun-12 4 document number: 81629 for technical questions, contact: esdprotection@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t amb = 25 c, unless otherwise specified) fig. 1 - esd discharge current wave form acc. iec 61000-4-2 (330 ? /150 pf) fig. 2 - 8 /20 s peak pulse current wave form acc. iec 61000-4-5 fig. 3 - typical capacitance c d vs. reverse voltage v r fig. 4 - typical forward current i f vs. forward voltage v f fig. 5 - typical reverse voltage v r vs. reverse current i r fig. 6 - typical peak clamping voltage v c vs. peak pulse current i pp 0 % 20 % 40 % 60 % 80 % 100 % 010203040 time ( s) i ppm 20 s to 50 % 8 s to 100 % 20548 0 % 20 % 40 % 60 % 80 % 100 % 120 % - 10 0 10 20 30 40 50 60 70 80 90 100 time (ns) discharge c u rrent i esd rise time = 0.7 ns to 1 ns 53 % 27 % 20557 0 5 10 15 20 25 30 35 012 456 v r ( v ) c d (pf) f = 1 mhz bias-mode bisy-mode pin 1, 2, 3, 4, 5, 6, 7 or 8 to pin 9 b et w een 2 pins (1 - 8) pin 9 not connetced 3 20558 0.001 0.01 0.1 1 10 100 0.5 0.6 0.7 0.8 0.9 1 v f ( v ) i f (ma) pin 9 to pin 1, 2, 3, 4, 5, 6, 7 or 8 20559 0 1 2 3 4 5 6 7 8 0.01 0.1 1 10 100 1000 10000 i r ( a) v r ( v ) pin 1, 2, 3, 4, 5, 6, 7 or 8 to pin 9 20560 - 6 - 4 - 2 0 2 4 6 8 10 12 14 0123456 i pp (a) v c ( v ) meas u red acc. iec 61000-4-5 (8/20 s - w a v e form) v c positi v e s u rge negati v e s u rge pin 1, 2, 3, 4, 5, 6, 7 or 8 to pin 9 20561
VESD05A8A-HNH www.vishay.com vishay semiconductors rev. 1.5, 26-jun-12 5 document number: 81629 for technical questions, contact: esdprotection@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 7 - typical clamping performance at + 8 kv contact discharge (acc. iec 61000-4-2) fig. 8 - typical clamping performance at - 8 kv contact discharge (acc. iec 61000-4-2) fig. 9 - typical peak clamping voltage at esd contact discharge (acc. iec 61000-4-2) - 40 - 20 0 20 40 60 80 - 10 0 10 20 30 40 50 60 70 80 90 t (ns) v c-esd ( v ) acc. iec 61000-4-2 + 8 k v contact discharge 20562 - 80 - 60 - 40 - 20 0 20 40 - 10 0 10 20 30 40 50 60 70 80 90 t (ns) v c-esd ( v ) acc. iec 61000-4-2 - 8 k v contact discharge 20563 - 200 - 150 - 100 - 50 0 50 100 150 200 250 0 5 10 15 20 25 30 v esd (k v ) v c-esd ( v ) acc. iec 61000-4-2 contact discharge v c-esd pin 1, 2, 3, 4, 5, 6, 7 or 8 to pin 9 positi v e discharge negati v e discharge 20564
VESD05A8A-HNH www.vishay.com vishay semiconductors rev. 1.5, 26-jun-12 6 document number: 81629 for technical questions, contact: esdprotection@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 package dimensions in millimeters (inches): llp1713-9l 20386 foot print recommendation: created - date: 28. a u g u st 2006 doc u ment no.:s8- v -3906.04-001 (4) 1.75 (0.069) 1.65 (0.065) pin 1 marking 0.05 (0.002) 0 (0.000) 0.152 (0.006) ref. 1.2 (0.047) ref. 0.3 (0.012) 0.24 (0.009) 0.4 (0.016) b sc 0.23 (0.009) 0.17 (0.007) 1.05 (0.041) 1.4 (0.055) 1.3 (0.051) 0.6 (0.024) 0.5 (0.020) 0.45 (0.018) 0.35 (0.014) exp. dap 0.2 (0.008) x 45 solder resist mask solder pad 0.4 (0.016) 0.2 (0.008) 3 x 0.4 = 1.2 (0.047) 1 (0.039) 0.4 (0.016) 0.15 (0.006) 0.4 (0.016) 0.42 (0.017) re v . 1 - date: 27. may 2008
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